Analyser: Solver, Ad-Hoc Geometry and EDC


The solver is now working, generating a fairly flexible, high level, geometry description of the track and logical blocks present. The default geometry detection generates this format, but a predefined geometry can be attached to any block pattern. If the pattern matching succeeds, the predefined geometry is used instead of the generated one.

EDC Support is also now implemented.

This removes the following items from the previous list of outstanding elements:

  • Solver; much simpler than it used to be, since most of the work is already done through the format and pattern matching.
  • Support ad-hoc geometry change through block patterns (useful for example for blocks with partial weak areas, read: the only unsupported weak sector format in Speedlock).
  • Support any kind of EDC and EDC area through the script generation.